Recently, the function of a circuit system as an information processing device has become more and more complicated with a demand for higher performance of the information processing device from users. Thus, the circuit system includes a plurality of integrated circuits integrating processing circuits or the like for providing respective functions. A typical type of circuit system contains integrated circuits such as a central processing unit (CPU) and an interface circuit, and the integrated circuits are connected with one another via a bus.
This type of circuit system provides desired functions under the control of the CPU which accesses and controls other integrated circuits. When accessing other integrated circuits, the CPU outputs a chip select signal as a device select signal to select an access target device, and accesses the selected integrated circuit via the bus. In this case, the CPU reads and writes data from and to the access target device by using an access control signal and in access timing corresponding to the access target device.
The circuit system including the CPU which accesses the device by using the chip select signal has been disclosed in Japanese Patent Publication No. 2006-140755 and Japanese Patent Publication No. 2008-250533, for example. According to a communication system shown in Japanese Patent Publication No. 2006-140755 which has a CPU outputting plural types of chip select signal and connected with plural devices, the chip select signals different for each device are allocated to the respective devices, and the chip select signal corresponding to the access target device is activated when the target device is accessed. According to the technology shown in Japanese Patent Publication No. 2008-250533, chip select signals from different CPUs are allocated to the same device, and connection of the bus is switched such that reduction of control time can be achieved by simple circuit structure.
In case of the technologies disclosed in Japanese Patent Publication No. 2006-140755 and Japanese Patent Publication No. 2008-250533, the device allocated to the chip select signal as access target is accessed by using the access control signal and in the access timing determined beforehand in correspondence with the device. Thus, when the devices are accessible by plural access methods, the access timing and others need to be rewritten by a control register or the like. In this case, the access methods cannot be switched at high speed.